1. Field of the Invention
The present invention relates to an integrated circuit that can be switched between an active mode and standby a mode, and more particularly to an integrated circuit having two processing circuits that are supplied in common by a power-supply voltage.
2. Description of the Related Art
Integrated circuit devices having a plurality of processing circuits are now being manufactured as one-chip microcomputers and are being employed in electronic apparatus such as portable telephones.
An electronic apparatus such as a portable telephone that is carried by a user inevitably takes a battery as its power supply, and batteries are therefore being made lighter and more compact to meet the demand for smaller and lighter devices. However, the additional demand for long operating time results in a drastic need for reduction in the power consumption of these integrated circuit devices. In the case of digital portable telephones, moreover, these integrated circuit devices must also be capable of high-speed operation in order to carry out digital processing of speech signals in real time.
Although waiting for incoming calls necessitates constant operation in the case of a portable telephone, not all components need operate constant. Integrated circuit devices in current portable telephones realize lower power consumption by operating only the minimum necessary processing circuits during standby.
Further, the drive voltage of the transistors of processing circuits may also be increased to accelerate the operation of an integrated circuit device. Merely increasing the drive voltage, however, inevitably increases power consumption, while decreasing the drive voltage lowers the operating speed of transistors, but both decreasing the drive voltage and reducing the thickness of the gate insulation film of transistors can increase ON current and realize high-speed operation while reducing the power consumption.
Reducing the thickness of the gate insulation film of a transistor, however, results in an increase in gate leak current even if the drive voltage is reduced to prevent variation in operating speed. As shown in FIG. 1, if the gate insulation film thickness of a transistor is 20 xc3x85, its gate length is 0.1 xcexcm and its gate width is 10 xcexcm, for example, a gate leak current of 10 pA occurs between the gate electrode and semiconductor substrate even with a drive voltage of 1.2 V.
In a CMOS (Complementary Metal Oxide Semiconductor) circuit in particular, drive voltage is constantly applied between one of gate electrodes of the n-type and p-type MOS transistors and the semiconductor substrate, with the result that a gate leak current is constantly generated. Integrated circuit devices currently may integrate several million transistors, and the gate leak current therefore cannot be ignored. In an integrated circuit device having five million CMOS transistors, for example, the total gate leak current reaches a maximum of 25 xcexcxc3x85.
The gate leak current of the transistors therefore increases despite both reducing the power-supply voltage and decreasing the thickness of the gate insulation film of the integrated circuit device so as to realize high-speed operation while reducing power consumption during operation as described hereinabove. As a result, satisfactory reduction of power consumption during standby is problematic. Increasing the thickness of the gate insulation film of the transistors of the integrated circuit device can reduce the gate leak current of the transistors, but this increase in layer thickness complicates high-speed operation.
It is an object of the present invention to provide an integrated circuit device that is capable of high-speed operation at a low current during operation while reducing power consumption during standby.
It is another object of the present invention to provide an electronic apparatus that includes the above-described integrated circuit device.
It is a further object of the present invention to provide a method of fabricating the above-described integrated circuit device.
According to one aspect of the present invention, an integrated circuit device comprises: means for switching each mode, means for generating a power-supply voltage, a first processing circuit having a first transistor, and a second processing circuit having a second transistor.
The first transistor has the thinnest gate insulation film and is driven by the power-supply voltage only during active mode. The second transistor has a gate insulation film that is thicker than the gate insulation film of the first transistor, and is driven by the power-supply voltage both during active mode and standby mode.
Although the second transistor operates at slower speed because its gate insulation film is not the thinnest, it can be driven in standby mode with minimal gate leak current. Since its gate insulation film is thinnest, the first transistor has greater gate leak current but can be driven to operate at high speed only during active mode.
The integrated circuit device executes processing that requires high-speed operation by high-speed transistors and executes processing that does not require high-speed operation by transistors having minimal leak current and therefore is capable of comprehensively realizing high-speed operation while reducing leak currents and can realize both higher performance and lower power consumption.
In an embodiment, an integrated circuit device further comprises a third processing circuit having a third transistor. The third transistor has a gate insulation film that is thicker than the gate insulation film of the second transistor and is driven at a higher voltage than the first and second transistors.
The third transistor has a high drive voltage and operates at high speed with little gate leak current because its gate insulation film is thickest. The first transistor has a low drive voltage, and although it has significant gate leak current because its gate insulation film is thinnest, it operates at high speed only during active mode. The second transistor does not have the thinnest gate insulation film and is driven by a low voltage and therefore can also operate in standby mode at a lower speed than the first transistor with minimal gate leak current.
The integrated circuit device executes processing requiring high-speed operation by high-speed transistors and executes processing that does not require high-speed operation by transistors having minimal leak current, and therefore is capable of comprehensively realizing high-speed operation while reducing leak currents and can provide both higher performance and lower power consumption.
In an embodiment, the second processing circuit turns the first processing circuit ON and OFF. In this case, a first processing circuit that is capable of high-speed operation but which is prone to significant gate leak current during standby can be turned ON and OFF by a second processing circuit that has slow operation but minimal gate leak current.
In an embodiment, the second processing circuit begins supplying voltage to the first processing circuit upon detecting the input of a prescribed signal from the outside during standby mode. In this case, the first processing circuit in standby mode can be activated by the input of a prescribed signal from the outside.
In an embodiment, the gate insulation film of the first transistor is composed of a thermal oxidation film that has been grown on the surface of a semiconductor substrate, and the gate insulation film of the second transistor is composed of a thermal oxidation film that has been grown, simultaneously with the gate insulation film of the first transistor, on the surface of a semiconductor substrate in which at least one of argon, fluorine, and a fluorine compound has been implanted.
In this case, the thermal oxidation film that is grown on the surface of a semiconductor substrate in which at least one of argon, fluorine, and a fluorine compound has been implanted is thicker than a thermal oxidation film that is grown at the same time on a surface that has not been implanted. The gate insulation film of the second transistor can thus be formed as a thicker layer than the gate insulation film of the first transistor, whereby first and second transistors having gate insulation films of differing thicknesses can be fabricated by a simple method.
In an embodiment, the gate insulation film of the second transistor is composed of a thermal oxidation film that is grown on the surface of a semiconductor substrate; and the gate insulation film of the first transistor is composed of a thermal oxidation film that is grown simultaneously with the gate insulation film of the second transistor on the surface of a semiconductor substrate that has been implanted with at least one of indium and nitrogen.
In this case, a thermal oxidation film that is grown on the surface of a semiconductor substrate implanted with at least one of indium and nitrogen is thinner than a thermal oxidation film that is grown simultaneously on a surface that is not implanted. As a result, the gate insulation film of the first transistor can be formed thinner than the gate insulation film of the second transistor, and first and second transistors having gate insulation films of differing thicknesses can be fabricated by a simple method.
In an embodiment, a battery is separate from the integrated circuit device, and the power-supply voltage is supplied to the integrated circuit device from this battery. In this case, the power-supply voltage generated by the battery can be supplied in common to the first and second processing circuits.
According to one aspect of the present invention, an electronic apparatus comprises: means for switching between each mode, a first processing circuit having a first transistor, a second processing circuit having a second transistor, a power supply that generates the power-supply voltage, a battery that supplies the main unit power to the power supply, and a power supply switch that turns the battery ON and OFF.
When the power supply switch is turned ON, the main unit power is supplied from the battery to the power supply, this power-supply voltage being supplied to the second processing circuit at all times but supplied to the first processing circuit only during active mode. The second transistor does not have the thinnest gate insulation film and therefore operates at a low speed, but this transistor can also be driven in the standby mode with minimal gate leak current. Since the first transistor has the thinnest gate insulation film, it has considerable gate leak current, but this transistor is driven at a high operating speed only during active mode. The first and second transistors are thus optimized according to respective modes and operating speeds, and the integrated circuit device therefore is capable of comprehensively realizing high-speed operation while reducing the leak current and can provide both a higher level of performance and lower power consumption.
According to another aspect of the present invention, an electronic apparatus comprises: means for switching between each mode, a first processing circuit having a first transistor, a second processing circuit having a second transistor, a third processing circuit having a third transistor, a low-voltage power supply, a high-voltage power supply, a battery for supplying main unit power to the power supplies, a power supply switch for turning the battery ON and OFF, and a notification means for notifying the second processing circuit of the need or lack of need for operation of the first processing circuit.
The low-voltage power supply supplies a low voltage in common to the first and second processing circuits of the integrated circuit device, and the high-voltage power supply supplies high voltage to the third processing circuit. The notification means reports to the second processing circuit of prescribed data that can determine the need for operation of the first processing circuit, and this second processing circuit turns the first processing circuit ON and OFF in accordance with the report of the notification means, whereby the integrated circuit device can provide both higher performance and lower power consumption.
According to one aspect of the present invention, in a first circuit fabrication method for fabricating an integrated circuit device of the present invention, a thermal oxidation film is formed over the entire surface of a semiconductor substrate, and a resist mask is formed at the positions of first and third processing circuits on the surface of this thermal oxidation film. The thermal oxidation film at the position of the second processing circuit that is left exposed by the resist mask is implanted with at least one of argon, fluorine, and a fluorine compound, and following this implantation, the thermal oxidation film is removed at the positions of the first and second processing circuits. A thermal oxidation film is grown at the position of the third processing circuit, and a thermal oxidation film is grown over the entire surface of the semiconductor substrate that has been implanted at the position of the second processing circuit, these thermal oxidation films forming the gate electrodes of the first transistor and the second and third transistors, thereby producing the integrated circuit device of this invention.
Thus, in the circuit fabrication method of this invention, thermal oxidation films are formed simultaneously at the positions of the first and second processing circuits of the integrated circuit device of the present invention, but since argon, fluorine, or a fluorine compound is implanted only at the position of the second processing circuit, the growth of the thermal oxidation film at the position of the second processing circuit can be accelerated more than at the position of the first processing circuit. In addition, the thermal oxidation film at the position of the third processing circuit, which is composed of two layers, can be formed thicker than the position of the second processing circuit. As a result, a gate insulation film of the first transistor having thickness a, a gate insulation film of the second transistor having thickness b, and a gate insulation film of the third transistor having thickness c, these thicknesses satisfying the relation xe2x80x9ca less than b less than c,xe2x80x9d can be formed by a simple process on the surface of one semiconductor substrate.
According to another aspect of the present invention, in a second circuit fabrication method for fabricating an integrated circuit device of the present invention, a thermal oxidation film is grown across the entire surface of a semiconductor substrate, and a resist mask is formed at the position of the third processing circuit on the surface of this thermal oxidation film. The thermal oxidation film at the positions of the first and second processing circuits that is left exposed by this resist mask is removed, and a resist mask is formed at the position of the second processing circuit where this thermal oxidation film was removed. At least one of indium and nitrogen is implanted into the semiconductor substrate at the position of this first processing circuit that is exposed from this resist mask, and following this implantation, the resist mask is removed and a thermal oxidation film grown over the entire surface of the semiconductor substrate. The gate electrodes of the first transistor and the second and third transistors are formed by this thermal oxidation film, thereby producing the integrated circuit device of the present invention.
Thus, according to the circuit fabrication method of this invention, thermal oxidation films are formed simultaneously at the positions of the first and second processing circuits of the integrated circuit device of this invention, but since indium or nitrogen is implanted only at the position of the first processing circuit, the growth of the thermal oxidation film at the position of the first processing circuit can be reduced from that of the position of the second processing circuit. In addition, the thermal oxidation film at the position of the third processing circuit, which is composed of two layers, can be formed thicker than the position of the second processing circuit. As a result, a gate insulation film of thickness a of the first transistor, a gate insulation film of thickness b of the second transistor, and a gate insulation film of thickness c of the third transistor, these thicknesses satisfying the relation xe2x80x9ca less than b less than c,xe2x80x9d can be formed by a simple process on the surface of one semiconductor substrate.
According to a further aspect of the present invention, in a third circuit fabrication method for fabricating an integrated circuit device of the present invention, a thermal oxidation film is grown over the entire surface of a semiconductor substrate, and a thermal oxidation mask for preventing thermal oxidation is formed at the position of a first processing circuit on the surface of this thermal oxidation film. A thermal oxidation film is grown on the surface of the semiconductor substrate at the positions of the second and third processing circuits that are left exposed by this thermal oxidation mask, and a resist mask is formed at the position of the third processing circuit on this thermal oxidation film. The thermal oxidation film at the position of the second processing circuit that is left exposed by this resist mask and thermal oxidation mask is removed, and after removing this thermal oxidation film, the resist mask is removed. A thermal oxidation film is grown at the positions of the second and third processing circuits that are left exposed by the thermal oxidation mask, and the gate electrodes of the first transistor and the second and third transistor are formed from the thermal oxidation film, thereby fabricating the integrated circuit device of the present invention.
Thus, in the circuit fabrication method of the present invention, after causing a thermal oxidation film to grow to an appropriate thickness at the position of the first processing circuit of the integrated circuit device of the present invention, this film is shielded by a thermal oxidation mask, and a thermal oxidation film is grown at the positions of a second and third processing circuits, whereby thermal oxidation films can be grown at particular thicknesses at the positions of the first and second processing circuits. In addition, the thermal oxidation film at the position of the third processing circuit, which is composed of two layers, can be formed thicker than the position of the second processing circuit. As a result, a gate insulation film of thickness a of the first transistor, a gate insulation film of thickness b of the second transistor, and a gate insulation film of thickness c of the third transistor, these thicknesses satisfying the relation xe2x80x9ca less than b less than c,xe2x80x9d can be formed by a simple process on the surface of one semiconductor substrate.
According to still another aspect of the present invention, in a fourth circuit fabrication method of an integrated circuit device of the present invention, a thermal oxidation film is formed over the entire surface of a semiconductor substrate, and a thermal oxidation mask for preventing thermal oxidation is formed at the position of the second processing circuit on the surface of this thermal oxidation film. A thermal oxidation film is formed on the surface of the semiconductor substrate at the positions of the first and third processing circuits that are left exposed by this thermal oxidation mask, and a resist mask is formed at the position of the third processing circuit on the surface of this thermal oxidation film. The thermal oxidation film at the position of the first processing circuit that is left exposed by this resist mask and thermal oxidation mask is removed, and after removing this thermal oxidation film, the resist mask is removed. A thermal oxidation film is grown at the positions of the first and third processing circuits that are left exposed by the thermal oxidation mask, and the gate electrodes of the first transistor, the second transistor, and the third transistor are formed by the thermal oxidation film, whereby the integrated circuit device of the present invention is fabricated.
Thus, in the circuit fabrication method of the present invention, a thermal oxidation film is grown to an appropriate layer thickness at the position of the second processing circuit of the integrated circuit device of the present invention, following which this thermal oxidation film is shielded by a thermal oxidation mask, thermal oxidation films are caused to grow at the positions of the first and third processing circuits, whereby the thermal oxidation films at the positions of the first and second processing circuits can each be formed to particular thicknesses. In addition, the thermal oxidation film at the position of the third processing circuit, which is composed of two layers, can be formed thicker than at the position of the second processing circuit. As a result, a gate insulation film of thickness a of the first transistor, a gate insulation film of thickness b of the second transistor, and a gate insulation film of thickness c of the third transistor, these thicknesses satisfying the relation xe2x80x9ca less than b less than c,xe2x80x9d can be easily formed on the surface of one semiconductor substrate.
In an embodiment, a thermal oxidation mask is formed on a conductive layer, and at least the gate electrode of the first transistor is formed by this conductive layer. In this case, the productivity of the integrated circuit device can be improved because the gate electrode of the first transistor is formed from the conductive layer of a thermal oxidation mask that is formed to control the thickness of the gate insulation film of the first transistor.
In an embodiment, the conductive layer of a thermal oxidation mask is formed from a polysilicon film. In this case, the polysilicon film can effectively prevent the physical thermal oxidation of the lower layer and can be used as the conductive layer of the gate electrode, thereby enabling the effective production of an integrated circuit device having good properties.
According to yet a further aspect of the present invention, in a fifth circuit fabrication method for fabricating an integrated circuit device of the present invention, a thermal oxidation film is grown over the entire surface of a semiconductor substrate, and a first polysilicon film for preventing thermal oxidation is formed at the position of the first processing circuit on the surface of this thermal oxidation film. A thermal oxidation film is grown on the surface of the first polysilicon film at the positions of the exposed second and third processing circuits, and a resist mask is formed at the position of the third processing circuit on the surface of this thermal oxidation film. The thermal oxidation film is removed from the surface of the first polysilicon film at the position of the second processing circuit that is exposed from this resist mask, and after removal of this thermal oxidation film, the resist mask is removed. A thermal oxidation film is grown on the surface of the first polysilicon film at the positions of the second and third processing circuits, and a second polysilicon film is formed on the surfaces of this thermal oxidation film and the first polysilicon film. A resist mask is formed at the positions of the second and third processing circuits on the surface of this second polysilicon film, and the second polysilicon film is removed at the position of the first processing circuit that is left exposed by this resist mask. The thermal oxidation film at the position of the first processing circuit that is exposed by this removal is removed to expose the first polysilicon film, and the resist mask is removed from the positions of the second and third processing circuits to expose the second polysilicon film. The first polysilicon film at the position of the first processing circuit is patterned to form the gate electrode of the first transistor and the second polysilicon film at the positions of the second and third processing circuits is patterned to form the gate electrodes of the second and third transistors, thereby producing the integrated circuit device of the present invention.
Thus, in the circuit fabrication method of this invention, after growing a thermal oxidation film at the position of the first processing circuit of the integrated circuit device of this invention to an appropriate thickness, this thermal oxidation film is shielded by a first polysilicon film and a thermal oxidation film is grown at the positions of the second and third processing circuits, whereby the thermal oxidation films at the positions of the first and second processing circuits are each formed at particular thicknesses. Since the thermal oxidation film at the position of the third processing circuit is composed of two layers, it can be formed thicker than at the position of the second processing circuit. In addition, the gate electrode of the first transistor is formed from the first polysilicon film, which is formed to control the thickness of the gate insulation film of the first transistor.
Accordingly, the thermal oxidation films at the positions of the first and second processing circuits can each be formed to a particular thickness, and the thermal oxidation film at the position of the third processing circuit, which is composed of two layers, can be formed thicker than at the position of the second processing circuit. As a result, the gate insulation film of thickness a of the first transistor, the gate insulation film of thickness b of the second transistor, and the gate insulation film of thickness c of the third transistor, these thicknesses satisfying the relation xe2x80x9ca less than b less than c,xe2x80x9d can be formed by a simple process on the surface of one semiconductor substrate.
According to yet a further aspect of the present invention, in the sixth circuit fabrication method for fabricating an integrated circuit device of the present invention, a thermal oxidation film is grown over the entire surface of a semiconductor substrate, and a first polysilicon film for preventing thermal oxidation is formed at the position of the second processing circuit on the surface of this thermal oxidation film. A thermal oxidation film is grown on the surface of the first polysilicon film at the positions of the exposed first and third processing circuits, and a resist mask is formed at the position of the third processing circuit on the surface of this thermal oxidation film. The thermal oxidation film is removed from the surface of the first polysilicon film and the position of the first processing circuit that is left exposed by this resist mask, and the resist mask is removed after this removal of the thermal oxidation film. A thermal oxidation film is grown on the surface of the first polysilicon film at the positions of the first and third processing circuits, and a second polysilicon film is formed on the surface of this thermal oxidation film and the first polysilicon film. A resist mask is formed at the positions of the first and third processing circuits on the surface of this second polysilicon film, and the second polysilicon film is removed at the position of the second processing circuit that is left exposed by this resist mask. The thermal oxidation film at the position of the second processing circuit that is exposed by this removal is removed to expose the first polysilicon film, and the resist mask is removed from the positions of the first and third processing circuits to expose the second polysilicon film. The first polysilicon film at the position of the second processing circuit is patterned to form the gate electrode of the second transistor, and the second polysilicon film at the positions of the first and third processing circuits is patterned to form the gate electrodes of the first and third transistors, thereby producing the integrated circuit device of the present invention.
Thus, in the circuit fabrication method of the present invention, the thermal oxidation film at the position of the second processing circuit of the integrated circuit device of the present invention is grown to an appropriate thickness, following which this thermal oxidation film is shielded by a first polysilicon film to grow thermal oxidation films at the positions of the first and third processing circuits, whereby the thermal oxidation films at the positions of the first and second processing circuits are each grown to a particular thickness. Since the thermal oxidation film at the position of the third processing circuit is composed of two layers, it is formed thicker than the position of the second processing circuit. In addition, the gate electrode of the second transistor is formed from the first polysilicon film, which is formed for controlling the thickness of the gate insulation film of the second transistor.
Accordingly, the thermal oxidation film at the positions of the first and second processing circuits can each be formed to a particular thickness, and the thermal oxidation film at the position of the third processing circuit, which is composed of two layers, can be formed thicker than the position of the second processing circuit. As a result, the gate insulation film of thickness a of the first transistor, the gate insulation film of thickness b of the second transistor, and the gate insulation film of thickness c of the third transistor, these thicknesses satisfying the relation xe2x80x9ca less than b less than c,xe2x80x9d can be formed by a simple process on the surface of one semiconductor substrate.
According to yet a further aspect of the present invention, in a seventh circuit fabrication method for fabricating an integrated circuit device of the present invention, a thermal oxidation film is grown over the entire surface of a semiconductor substrate, and a first polysilicon film for preventing thermal oxidation is formed on the surface of this thermal oxidation film at the position of the first processing circuit. A thermal oxidation film is formed on the surface of the first polysilicon film at the positions of the exposed second and third processing circuits, and a resist mask is formed at the position of the third processing circuit on the surface of this thermal oxidation film. The thermal oxidation film is removed from the surface of the first polysilicon film at the position of the second processing circuit that is left exposed from this resist mask, and the resist mask is removed after this removal of the thermal oxidation film. A thermal oxidation film is grown on the surface of the first polysilicon film at the positions of the second and third processing circuits, and a second polysilicon film is formed on the surfaces of this thermal oxidation film and the first polysilicon film. This second polysilicon film is removed from the position of the first processing circuit and patterned at the positions of the second and third processing circuits to form the gate electrodes of the second and third transistors, a resist mask is formed at the positions of the second and third processing circuits, and the first polysilicon film at the position of the first processing circuit that is left exposed by this resist mask is patterned to form the gate electrode of the first transistor, thereby producing the integrated circuit device of the present invention.
Thus, in the circuit fabrication method of the present invention, a thermal oxidation film is grown at the position of the first processing circuit of the integrated circuit device of the present invention to an appropriate thickness, following which this thermal oxidation film is shielded by a first polysilicon film and a thermal oxidation film is grown at the positions of the second and third processing circuits, whereby the thermal oxidation films at the positions of the first and second processing circuits are each formed to a particular thickness. Since the thermal oxidation film at the position of the third processing circuit is composed of two layers, it is formed thicker than at the position of the second processing circuit. In addition, the gate electrode of the first transistor is formed from the first polysilicon film that is formed for controlling the thickness of the gate insulation film of the first transistor. Finally, the etching of the gate electrode located on the surface of the thinnest gate insulation film of the first transistor is performed separately from the etching of the gate electrodes of the second and third transistors.
Accordingly, the thermal oxidation films at the positions of the first and second processing circuits can each be formed to a particular thickness, and the thermal oxidation film at the position of the third processing circuit, which is composed of two layers, can be formed thicker than the position of the second processing circuit. As a result, the gate insulation film of thickness a of the first transistor, the gate insulation film of thickness b of the second transistor, and the gate insulation film of thickness c of the third transistor, these thicknesses satisfying the relation xe2x80x9ca less than b less than c,xe2x80x9d can be formed by a simple process on the surface of one semiconductor substrate. Finally, not only can the productivity of the integrated circuit device be improved, but the gate electrodes of the first to third transistors can each be etched under the respective optimum conditions.
According to yet a further aspect of the present invention, in the eighth circuit fabrication method for fabricating an integrated circuit device of the present invention, a thermal oxidation film is grown over the entire surface of a semiconductor substrate, and a first polysilicon film for preventing thermal oxidation is formed at the position of the second processing circuit on the surface of this thermal oxidation film. A thermal oxidation film is grown on the surface of the first polysilicon film at the positions of the exposed first and third processing circuits, and a resist mask is formed at the position of the third processing circuit on the surface of this thermal oxidation film. The thermal oxidation film is removed from the surface of the first polysilicon film and the position of the first processing circuit that is left exposed by this resist mask, and the resist mask is removed after this removal of the thermal oxidation film. A thermal oxidation film is grown on the surface of the first polysilicon film and at the positions of the first and third processing circuits, and a second polysilicon film is formed on the surfaces of this thermal oxidation film and the first polysilicon film. This second polysilicon film is both removed from the position of the second processing circuit and patterned at the positions of the first and third processing circuits to form the gate electrodes of the first and the third transistors, a resist mask is formed at the positions of the first and third processing circuits, and the first polysilicon film at the position of the second processing circuit that is left exposed by this resist mask is patterned to form the gate electrode of the second transistor, thereby producing the integrated circuit device of the present invention.
Thus, in the circuit fabrication method of the present invention, a thermal oxidation film is grown to an appropriate thickness at the position of the second processing circuit of the integrated circuit device of the present invention, following which this thermal oxidation film is shielded by a first polysilicon film to grow thermal oxidation films at the positions of the first and third processing circuits, whereby the thermal oxidation film at the positions of the first and second processing circuits are each formed to a particular thickness. Since the thermal oxidation film at the position of the third processing circuit is composed of two layers, it is formed thicker than at the position of the second processing circuit. In addition, the gate electrode of the second transistor is formed from the first polysilicon film that is formed for controlling the thickness of the gate insulation film of the second transistor. Finally, the etching of the gate electrode that is located on the surface of the thinnest gate insulation film of the second transistor is carried out separately from the etching of the gate electrodes of the first and third transistors.
Accordingly, the thermal oxidation films at the positions of the first and second processing circuits can each be formed to a particular thickness, and the thermal oxidation film at the position of the third processing circuit, which is composed of two layers, can be formed thicker than the position of the second processing circuit. As a result, the gate insulation film of thickness a of the first transistor, the gate insulation film of thickness b of the second transistor, and the gate insulation film of thickness c of the third transistor, these thicknesses satisfying the relation xe2x80x9ca less than b less than c,xe2x80x9d can be formed by a simple process on the surface of one semiconductor substrate. Finally, not only can the productivity of the integrated circuit device be improved, but the gate electrodes of the first to third transistors can each be etched under the respective optimum conditions.
The above and other objects, features, and advantages of the present invention will become apparent from the following description with reference to the accompanying drawings which illustrate examples of the present invention.